APPEARANCE
產品外觀
FEATURES
產品特色
SPECIFICATION
產品規格
Specification
Small size
Separate 64-byte RX and TX data FIFOs
Efficient SPI interface: All registers can be programmed with one "burst" transfer
Programmable output power up to +10dBm
High sensitivity (-111 dBm at 1.2 Kbps, 1% packet error rate)
| Parameter | Min | Max | Unit | Condition/Note |
|---|---|---|---|---|
| Supply Voltage | 2.7 | 3.3 | V | |
| Voltage on Any Digital Pin | -0.3 | VDD+0.3 | V | |
| Input RF Level | +10 | dBm | ||
| Storage Temperature Range | -50 | 150 | ℃ | |
| ESD | <50 | V | According to JEDEC STD 22, method A114, Human Body Model |
| Parameter | Min | Typ | Max | Unit | Condition/Note |
|---|---|---|---|---|---|
| Frequency Range | 300 | 928 | MHz | ||
| Data Rate | 1.2 | 250 | Kbps | ||
| Power Down Modes | 400 | nA | Voltage regulator to digital part off, register values retained (sleep state) | ||
| Current Consumption, RX | 16 | mA | |||
| Current Consumption, TX | 30 | mA | Transmit mode, +10dBm output power | ||
| Receiver Sensitivity | 1.2K data rate -111dBm | ||||
| Transmit Output Power | +10 | dBm | Transmit mode | ||